https://m.blog.naver.com/aakim66/221880224098 → 논리게이트 등가회로 참고 블로그

✅ 1. 1bit 비교기(comparator)

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module comparator_dataflow(
    input a, b,     // 입력 a, b(각 1bit)
    output equal,   // a == b -> 1
    output greator, // a > b -> 1
    output less     // a < b -> 1
    );

    assign equal = (a == b) ? 1'b1 : 1'b0;   // a와 b가 같으면 equal = 1
    assign greator = (a > b) ? 1'b1 : 1'b0;  // a가 b보다 크면 greator = 1
    assign less = (a < b) ? 1'b1 : 1'b0;     // a가 b보다 작으면 less = 1
endmodule

Sim(dataflow)

Sim(dataflow)

Elaborated(dataflow)

Elaborated(dataflow)

XOR(등가회로 확인)

XOR(등가회로 확인)

module comparator_structural (
    input a, b,
    output equal, greator, less
    );
    
    // equal = (~a & ~b) | (a & b)
    // greator = a & ~b
    // less = ~a & b
    
    wire nota, notb;
    wire a_and_b, nota_and_notb;
    wire a_and_notb, nota_and_b;

    not (nota, a);  // nota = ~a
    not (notb, b);  // notb = ~b

    and (nota_and_notb, nota, notb);        // ~a & ~b
    and (a_and_b, a, b);                    // a & b
    or  (equal, nota_and_notb, a_and_b);    // equal = (~a & ~b) | (a & b)

    and (greator, a, notb);                 // a & ~b
    and (less, nota, b);                    // ~a & b    
endmodule

Sim(strutural)

Sim(strutural)

structural Elaborated

structural Elaborated

module comparator_behavioral (
    input a, b,
    output reg equal, greator, less
    );

    always @(a, b) begin
        equal = 0;
        greator = 0;
        less = 0;

        if (a == b)
            equal = 1;
        else if (a > b)
            greator = 1;
        else
            less = 1;
    end
endmodule

Sim(behavioral)

Sim(behavioral)

behavioral Elaborated

behavioral Elaborated

✅ 2. N bit 비교기(comparator)

module tb_comparator_4bit_full;
    
    reg [3:0] a, b;
    wire equal, greator, less;

    // DUT
    comparator_Nbit #(.N(4)) dut(
        .a(a),
        .b(b),
        .equal(equal),
        .greator(greator),
        .less(less)
    );

    integer i, j;

    initial begin
        $display("Time\\t a\\t b\\t |\\tequal\\tgreator\\tless");
        $monitor("%4t\\t %b\\t %b\\t | \\t%b\\t%b\\t%b", $time, a, b, equal, greator, less);

        // 모든 조합 테스트 (a -> 0 ~ 15, b -> 0 ~ 15)
        for (i = 0;i < 16;i = i + 1) begin
            for(j = 0; j < 16;j = j + 1) begin
                a = i;
                b = j;
                #5;
            end
        end
        $finish;
    end
endmodule

4bit Sim

4bit Sim